2.4 GHz ESP32 Wi-Fi and Bluetooth combo chip
- Buy 2 for $8.95 each and save 3%
- Buy 4 for $8.50 each and save 8%
ESP-WROOM-32 ESP-32S
More arriving soon !
Here is a link to an ESP32 project library to control addressable LEDs (neopixels) Courtesy of our customer Tam.
https://github.com/binnes/esp8266Workshop/blob/master/en/part1/LED.md
ESP32 is a single chip 2.4 GHz Wi-Fi and Bluetooth combo chip designed with TSMC low power 40nm technology. The main Processor is Tensilica Xtensa 32-bit LX6 microprocessor, Dual core
Wireless Connectivity Wi-Fi: 802.11 b/g/n/e/i (802.11n @ 2.4 GHz up to 150 Mbit/s)
Bluetooth: v4.2 BR/EDR and Bluetooth Low Energy (BLE)
ROM: 448 KiB For booting and core functions
SRAM: 520 KiB For data and instruction.
RTC Slow SRAM: 8 KiB For co-processor accessing during deep-sleep mode.
RTC Fast SRAM: 8 KiB For data storage and main CPU during RTC Boot from the deep-sleep mode.
eFuse: 1 Kibit Of which 256 bits are used for the system (MAC address and chip configuration) and the remaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID.
Embedded Flash: 0 MiB or 2 MiB (depending on variation).
External Flash and SRAM: ESP32 without embedded flash supports up to 4 × 16 mebibytes of external QSPI flash and SRAM with hardware encryption based on AES to protect developer's programs and data.
Peripheral Input/Output:
Rich peripheral interface with DMA that includes capacitive touch, ADCs , DACs , I²C , UART ,
CAN 2.0 (Controller Area Network), SPI (Serial Peripheral Interface), I²S (Integrated Inter-IC Sound), RMII (Reduced Media-Independent Interface), PWM , and more.
Security : IEEE 802.11 standard security features all supported, including WFA, WPA/WPA2 and WAPISecure bootFlash encryption1024-bit OTP, up to 768-bit for customers
Cryptographic hardware acceleration: AES, SHA-2, RSA, elliptic curve cryptography (ECC), random number generator (RNG)
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