Liquid crystal QVGA TFT LCD display 240 RGB x 320 with touch interface and large SD slot.
Power supply is 5 volts, however all logic IO is 3.3 volts. The adaptor board the display is attached to has a 3.3 volt regulator on board.
240374PQ
65K color
320*240
3.2 inch
Wide viewing angle
SSD1289:240 RGB x 320 TFT Driver
Integrated Power, Gate and Source Driver With RAM
ADS7843:4-WIRE TOUCH, UP TO 125kHz CONVERSION RATE, SERIAL INTERFACE
Display has a 40 pin connector, the display is a 16 bit parallel interface.
The above diagram appears to have some issues that requires the software to deal with, it uses a 4040 to create a strobe signal to present the data to the output latches, however every 16 clock cycles is fine for the data bits but it no good for the RD, WR and DC signal which is daisy chained to the 2 D0-D15 shift registers(74HC4094).
The data sheet states:
The data in each shift register stage is transferred to the storage register when the Strobe input is high.
So after 16 clocks, the strobe goes high and stays high for the next 16 clock pulses.
In this configuration you would have to clock out the upper (5 bits) RD,WR DC(bit 4), then reset the 4040 counter and clock out the remaining 16 data bits.
The parts shown in the diagram above are not included with the display.
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