Ethernet Interface W5500

Ethernet Interface W5500

The W5500 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems using SPI (Serial Peripheral Interface).

W5500 breakout board is userd where stable internet connectivity is required. A single chip to implement TCP/IP Stack, 10/100 Ethernet MAC and PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE. 32Kbytes internal buffer is used as it's data communication memory.

By using the W5500 breakout board, you can implement the Ethernet application needed by using a simple socket program. You can use eight independent hardware sockets at the same time. SPI for easy integration with the external MCU. The W5500 SPI supports 80 MHz speed and the new efficient SPI protocol, so you can implement high speed network communication. The W5500 provides WOL (Wake on LAN) and a power down mode for reduced system power consumption.

Features

• Supports following Hardwired TCP/IP Protocols : TCP, UDP, ICMP, IPv4, ARP, IGMP, PPPoE
• Supports 8 independent sockets simultaneously
• Supports Power down mode
• Supports Wake on LAN over UDP
• Supports High Speed Serial Peripheral Interface(SPI MODE 0, 3)
• Internal 32Kbytes Memory for Tx/Rx Buffers
• 10BaseT/100BaseTX Ethernet PHY embedded
• Support Auto Negotiation (Full and half duplex, 10 and 100-based)
• Not support IP Fragmentation
• 3.3V operation with 5V I/O signal tolerance
• LED outputs (Full/Half duplex, Link, Speed, Active)
• 48 Pin LQFP Lead-Free Package 7x7mm, 0.5mm pitch)